Inference Engine for Low-Power Real-Time Object Recognition Processor

Inference Engine for Low-Power Real-Time Object Recognition Processor

Abstract.

      Object recognition is computationally intensive and it is challenging to meet 30-f/s real-time processing demands under sub-watt low-power constraints of mobile platforms even for heterogeneous many-core architecture. In this paper, an intelligent inference engine (IIE) is proposed as a hardware con-troller for a many-core processor to satisfy the requirements of low-power real-time object recognition. The IIE exploits learning and inference capabilities of the neurofuzzy system by adopting the versatile adaptive neurofuzzy inference system (VANFIS) with the proposed hardware-oriented learning algorithm. Using the programmable VANFIS, the IIE can configure its hardware topology adaptively for different target classifications. Its archi-tecture contains analog/digital mixed-mode neurofuzzy circuits for updating online parameters to increase attention efficiency of object recognition process. It is implemented in 0.13-µm

CMOS process and achieves 1.2-mW power consumption with 94% average classification accuracy within 1-µs operation delay.

The 0.765-mm2 IIE achieves 76% attention efficiency and reduces power and processing delay of the 50-mm2 image processor by up to 37% and 28%, respectively, when 96% recognition accuracy is achieved.

Index Terms— Mixed-mode processor, neurofuzzy, object recognition, VLSI.
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